![]() Biocompatibility of the patterned PDMS layer was confirmed by culturing primary neuron cells on top of the layer for up to two weeks. Electrical resistance tests between adjacent electrodes with and without the insulation layer showed that the patterned PDMS layer functions properly as an electrical insulation layer. PDMS features as small as 15 µm were successfully patterned and the effects of each processing parameter on the final patterns were investigated. The thickness of the patterned PDMS layers could be accurately controlled (6.5–24 µm) by adjusting processing parameters such as PDMS spin-coating speeds, PDMS dilution ratios, and sacrificial photoresist thicknesses. Patterned PDMS layers were created by spin-coating liquid phase PDMS on top of a substrate having sacrificial photoresist patterns, followed by a photoresist lift-off process. The method enables creating PDMS patterns with small features and various thicknesses without any limitation in the designs and without the need for complicated processes or expensive equipments. Micropatterning of poly(dimethylsiloxane) using a photoresist lift-off technique for selective electrical insulation of microelectrode arraysĪ poly(dimethylsiloxane) (PDMS) patterning method based on a photoresist lift-off technique to make an electrical insulation layer with selective openings is presented. Results of lift-off profiles created in positive tone AZ7209 and ip3250 are presented here. ![]() For this investigation, lift-off profiles created using electron beam flood exposure of many popular photoresists were evaluated. This paper present a simple, repeatable process for creating robust, user-defined lift-off profiles in single layer photoresist using a non-thermal electron beam flood exposure. ![]() Until now, lift-off processing has relied on costly multi-layer photoresists schemes, image reversal, and non-repeatable photoresist processes to obtain the desired lift-off profiles in patterned photoresist. ![]() Key to the success of the lift-off process is the creation of a retrograde or undercut profile in the photoresists before the metal deposition step. These problems include both metal adhesion and plasma etch difficulties. In the manufacture of many types of integrated circuit and thin film devices, it is desirable to use a lift-of process for the metallization step to avoid manufacturing problems encountered when creating metal interconnect structures using plasma etch. Advanced metal lift-off process using electron-beam flood exposure of single-layer photoresist ![]()
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